This blog help all those professional who work on "Verification" domain and looking for new opportunity or revise their basics. So check list which need to be prepared is.
- System Verilog.
- OOPS.
- UVM.
- Bus Protocol (AMBA AHB or AXI).
- Other known Protocols.
- System Verilog
[01] Different Data types used in system verilog.
[02] Different 2 state and 4 state data types.
[03] Difference between "bit [7:0] (7 down to 0)" and 'byte' ?
[04] Difference between int and integer ?
- OOPS
[01] What is polymorphism ?
[02] How 'sequences', 'sequencer' and 'driver' are connected ?
- UVM
[01] What is 'uvm_config_db' ?
[02] What is 'virtual function' ?